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BKB's avatar
BKB
Icon for Occasional Contributor rankOccasional Contributor
9 months ago
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EMIF - ref_clk from a bank other than address control and share that ref clock for 2 EMIF instances

Hi, I am using a Stratix 10 1SG10MHN3F74C2LG dual die FPGA on our board. Each die has two EMIF instances. Each EMIF instance uses reference clock fed from the clk pins in the address control IO Ban...
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  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    8 months ago

    Hi Bharat,


    Unfortunately, the ref_clk need to be placed within the Address and Command group.

    Sharing the pin to other EMIF IP is permitted but need to follow the rules.


    Regards,

    Adzim


BKB's avatar
BKB
Icon for Occasional Contributor rankOccasional Contributor
8 months ago

Thanks Adzim. I went through that. I was hoping if there was a way to connect a clock from a different bank but there isn't.

Thanks again.

Best,

Bharat