Altera_Forum
Honored Contributor
14 years agoDUC and DDC on CycloneIII
Does any one have a model design in simulink of a DUC (digital up converter)and DDC that ca be implemented in a Cylone III FPGA.
Is there a reference design or example to interface this design with a HSMC (High Speed Mezzanine Card) I am trying to implement a IF stage with a CycloneIII devise. I am new in this technology so any advise, reference design, IP, etc will be appreciated very much Armando