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Navaneeth's avatar
Navaneeth
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3 years ago
Solved

DSP Block Stratix 10 - Multiply Accumulate

Hi We wish to perform c = c + (a * b) where, a, b and c are 32-bit unsigned numbers. Please let us know how best to implement this multiply-accumulate in Verilog so that the DSP blocks avail...
  • Kshitij_Intel's avatar
    Kshitij_Intel
    3 years ago

    Hi,

    You can also check the full design template within Quartus.

    Thank you

    Kshitij Goel

Navaneeth's avatar
Navaneeth
Icon for New Contributor rankNew Contributor
3 years ago

Thanks for the information.