Forum Discussion

Navaneeth's avatar
Navaneeth
Icon for New Contributor rankNew Contributor
3 years ago
Solved

DSP Block Stratix 10 - Multiply Accumulate

Hi We wish to perform c = c + (a * b) where, a, b and c are 32-bit unsigned numbers. Please let us know how best to implement this multiply-accumulate in Verilog so that the DSP blocks avail...
  • Kshitij_Intel's avatar
    Kshitij_Intel
    3 years ago

    Hi,

    You can also check the full design template within Quartus.

    Thank you

    Kshitij Goel

Kshitij_Intel's avatar
Kshitij_Intel
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi,

You can use the "Native Fixed Point DSP Intel Stratix 10 FPGA IP".

Thank you

Kshitij Goel