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LGonz14's avatar
LGonz14
Icon for New Contributor rankNew Contributor
6 years ago

Documentation for Cyclone 10 GX core components?

Using the mega-function wizard, I'm generating a GPIO IP in DDIO register mode. The mega-function wizard generated several files, among them altera_gpio.sv was found. Within this module, an instance ...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Luis,

Error(17044): Illegal connection on I/O input buffer primitive u31dc_0|u31pipe_0|u31ddiorx|gpio_0|core|gpio_one_bit.i_loop[23].altera_gpio_bit_i|input_buffer.ibuf. Source I/O pin u31dc_0|u31pipe_0|pipe_rx_phy[23] drives out to destinations other than the specified I/O input buffer primitive. Modify your design so the specified source I/O pin drives only the specified I/O input buffer primitive.

This error message indicates that the IP's input pin is connected to somewhere else instead of buffer. Can you check your design?

Thank You