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zlan01's avatar
zlan01
Icon for New Contributor rankNew Contributor
6 years ago

do the LPM_SHIFTREG must be used in the spi serial receiving code when the clock fequency is too fast?

input spi_data_i; output reg spi_data_o; reg [15:0]shift_sender; reg [15:0]shift_receiver; code 1: spi receiving code========================================================= always @(po...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

May I know which device you are using? It is mentioned that the receiving code cannot receive any data using Verilog to implement the shifting in register? Could you explain in details and provide error message (if any). Do you check the simulation result and sdc constraints?

Thanks.