New Contributor
New ContributorHello,
1) The Intel DPTX stopped the link training after failing the clock recovery phase. I may be wrong but I believe this may be because it reached a maximum number of attempts rather than a specific timeout. Per DP specs, I think a TX may give up on clock recovery after 10 failed attempts or after 5 attempts if the RX does not update values in the adjust request registers (voltage and preemphasis).
2) Apparently, the GPU DPTx gives the monitor a fair amount of time (15ms) between the write to voltage swing and preemphasis (h00103+) and checking the lane status (h00202+). The Intel DPTx checks this after 200us. This may explain the difference but this is already more than what is mandated in the DP standards (100us). I haven't found a way to tweak this.
3) The Xilinx DP RX also took a while and multiple attempts/adjustments to establish CR with the GPU DPTx. Do you have a shorter/better DP cable available to give this a second try?
Kind regards,
Vgs
