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DZuck1
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6 years ago

DisplayPort Only Connects to Windows not Linux

Hi, I am trying to use the DisplayPort sample design on a Stratix 10 board. I have implemented the exact sample project from Intel with the Bitec daughter card but am seeing some issues. When I plu...
DZuck1's avatar
DZuck1
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Here is the NVIDIA Control Panel showing that the DP output is using 4 lanes all at 8.1 Gbps.

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    DZuck1
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Hi Dlim,

    1. I have tried this and it didn’t seem to make a difference
    2. I am recompiling with the lower data rate set to try it out. Are the only changes to the IP core data rate settings or do I need to make changes in the RTL as well?
    3. I am downloading Quartus Pro v20.2 (Stratix 10 file is over 20 GB) and will try that out once it finishes downloading.
    4. We are targeting and doing the bulk of the testing with an NVIDIA RTX 6000 Graphics card. I have also been testing with a Geforce 660 Ti. The monitor I am using in conjunction with the IP core is a Dell U2718Q.
    5. The logs are attached.

    The AUX logs are for linux and windows for both the GeForce 660 and the RTX 6000. The only combination that has data flowing out of the clkrec core is the Geforce 660 running win7.

    Thanks,

    Daniel

    • DZuck1's avatar
      DZuck1
      Icon for Occasional Contributor rankOccasional Contributor
      6 years ago

      Hi dlim,

      Installing the Stratix 10 device file for Quartus Pro v20.2 is taking longer than I expected. It is 20 GB and exceeds the download file size allowed by my company. Are there plans to break up these larger device files into multiple parts in the future releases?

      Thanks,

      Daniel

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        DZuck1
        Icon for Occasional Contributor rankOccasional Contributor
        6 years ago

        Hi dlim,

        I have successfully installed Quartus v20.2 on my PC. I created a new DisplayPort sample project in Quartus v20.2 and merged in the new IP cores and software into my current design. When I try to compile it I have been experiencing an error when "Route" reaches 53%. I am not sure why this is happening now. I am attaching the stack trace displayed when crashing.

        Originally I thought this was due to some port names being renamed from the cores. I cleaned that up in my RTL and it is still giving me this problem.

        Any clue why this might be happening?

        Thanks,
        Daniel