Forum Discussion
MLaks3
New Contributor
6 years agoDisplayPort IP evaluation
We have purchased Bitec's FMC-DP Version 11 and trying to evaluate DP IP on Cyclone 10GX Development Kit. Quartus Version: Quartus Prime 19.3 Target Kit: Cyclone 10 GX FPGA Development Kit We fol...
BoonT_Intel
Frequent Contributor
6 years agoHi Sir,
After you edit the config.h, do you rerun the build_sw.sh in script folder before recompile the design? and also regenerating the new .elf.
On both MSA, can see the link is totally not up on TX side. Looks like there are some issue on the transceiver side. Maybe you have to debug it from a transceiver perspective.
I found some collateral regarding transceiver. Not sure if this will helps. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an871.pdf