Altera_Forum
Honored Contributor
14 years agoDesigning a MIPI D-PHY CSI2 interface
Hello,
I am working on a design that needs to send pixel data via a camera link from a FPGA to a TI OMAP Camera ISP interface. The target FPGA is a Cyclone IV GX device. The Camera ISP on the TI OMAP is a MIPI D-PHY CSI2 and CSI1/CCP2 compatible interface. My questions are as follow: 1. Has anyone on the forum done similar design using an MIPI IP they bought from a IP vendor? 2. If there is someone out there that done this before, which IP vendor would you recommend? 3. What are your experiences design this interface and would you recommend to design this interface without using a MIPI IP core? (i.e. design this yourself) How many months of development time? 4. What Altera device were you using and what was the resource utilization for the IP core and the surrounding logic? 5. What was the speed and data lanes, throughput etc achieved via this interface? Thanks,