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New Contributor

6 years ago

Description of QSYS example design IP: PCIe DMA Controller 64/128 bit.

Hello! Please, help me with QSYS example design IP: PCIe DMA Controller 64 bit. I need to make a simple DMA exchange between Arria10 (EP) and CPU (RC) onboard thru PCIe Gen3 x1 link. Because of x1...

Waveform

New Contributor

6 years ago

Mentioned example is not suitable for me, because I have only one x1 PCIe link. High performance embedded DMA controller doesn't support this case. I have found by my self appropriate example:

https://forums.intel.com/s/contentdocument/0690P000004pfl4QAA

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Description of QSYS example design IP: PCIe DMA Controller 64/128 bit.

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