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New Contributor

6 years ago

Description of QSYS example design IP: PCIe DMA Controller 64/128 bit.

Hello! Please, help me with QSYS example design IP: PCIe DMA Controller 64 bit. I need to make a simple DMA exchange between Arria10 (EP) and CPU (RC) onboard thru PCIe Gen3 x1 link. Because of x1...

AnandRaj_S_Intel

Regular Contributor

6 years ago

Hi Andrey,

You can refer to the design example from below link.

https://forums.intel.com/s/createarticlepage?articleid=a3g0P0000005RPeQAM&action=view

https://forums.intel.com/ics-frm-article/a3g0P0000005RPUQA2/reference-design-gen3x8-avmm-dma-arria-10?articleid=a3g0P0000005RPUQA2&action=view

Regards

Anand

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Description of QSYS example design IP: PCIe DMA Controller 64/128 bit.

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