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Sijith's avatar
Sijith
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Debugging PCIe DMA transfer example design

Hi, I would like to have your continued support on this thread. Unfortunately this ticket got closed https://community.intel.com/t5/FPGA-Intellectual-Property/A-design-based-on-the-PCIe-DMA-transfe...
Pcie
Sijith's avatar
Sijith
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Hi VenTing,

Sorry for the confusion regarding the compilation error while adding Signal Tap. It is the modified DMA transfer example design that gives error while adding Signal Tap. I am attaching the stp1.stp file that on attaching with DMA example design gives the compilation error.

Unfortunately right clicking the screenshot and clicking 'Open image in new tab' you attached goes to a Intel sign in page (see image Azure.png). It would be great if you could e-mail me the image.

Regards

Sijith