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Otherwise what you describe is really a RAM that is to be initialized by your FPGA code during the startup process.
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Keeping that data secure is a high priority requirement. But they also want the flexibility of having different data in a different instance of the core. It sounds like the way to go is create a secure, encrypted IP for distribution. I imagine the customer would instance this as a back box and load the encrypted IP when they build the chip. We'd have to automate creating IP cores, each having it's own special data. Anyone have a better method?
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