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matferronato's avatar
matferronato
Icon for New Contributor rankNew Contributor
1 year ago

DDR4 EMIF - Read without read valid

In my design, I instantiated and configured the EMIF IP via IP Catalog (not platform designer). I then correctly connected the signals according to design examples from Terasic. The flow of data fr...
Memory
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi,


Maybe you can check if the address is satisfied with the burstlength.

Try to get which address that start to have read issue by testing multiple times.


You also can verify if the EMIF IP setting is matching to the memory device datasheet.


Regards,

Adzim