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senjd's avatar
senjd
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3 years ago

DDR4 controller arria 10 calibration issues.

In my arria 10 project, i am using ddr4 controller of intel ip with speed bins 1600 cl 12. After loading the bit file in to fpga, local_cal_success hits high. Which says that calibration passes. But w...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi senjd,


May I know any update on this thread?


Regards,

Adzim


  • senjd's avatar
    senjd
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hi AdzimZM_Intel,

    Yes. It is SOC Design.
    there is an update over it. It was due to reference clock of the ddr controller. clock was some how not proper with differential signals.

    Thanks for your replies.

    Thanks,

    senjd