New Contributor
Regular ContributorHi senjd,
How about the local_cal_fail signal?
Is it low or high?
The issue may be due to the OCT recalibration because the Periodic OCT has been enabled in the IP.
You may disable the option because the Periodic OCT is only required for high memory frequency (1200MHz and above).
Regards,
Adzim
New ContributorHi AdzimZM_Intel,
While doing the transactions, local_cal_success goes to low at random address. But local_cal_fail remails low.
About oct re calibration
Ddr4 controller ip system messages says :
Periodic OCT re calibration is disabled because the interface uses calibrated IO standard for either address, command and clock signals
The interface will have reduced read capture timing margin due to periodic OCT re calibration being disabled.
It seems like its already disabled.
I am using micron ddr4 MT40A512M16TB-062E:J. Which is having maximum speed bins till 3200MBps. But i am using 1600 speed bins as my fpga device does not support this speed grade.
So, is there anything i am missing?
