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senjd's avatar
senjd
Icon for New Contributor rankNew Contributor
3 years ago

DDR4 controller arria 10 calibration issues.

In my arria 10 project, i am using ddr4 controller of intel ip with speed bins 1600 cl 12. After loading the bit file in to fpga, local_cal_success hits high. Which says that calibration passes. But w...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi senjd,


May I know the EMIF IP setting that you used?


What is the Quartus version that has been used to generate the IP?


Why are you doing calibration again?

I'm not clear about this.

Maybe you can provide a little more explanation for better understanding.


Thanks & Regards,

Adzim



senjd's avatar
senjd
Icon for New Contributor rankNew Contributor
3 years ago
Hi AdzimZM_Intel,

Thanks for the reply.

I am using preset from DDR4-1600L CL 12 COMPONENT 1CS 8 Gb (512Mb x16)

Quartus version is 22.2

I had state machine to write/read the data into the ddr4 controller avalon interface. Enabling of the state machine triggers from jtag through tcl in system console.

When i tried to write the data or read the data from ddr4 then each time at random address, local_cal_pass deasserts, which means calibrarion has been failed somehow.

So i tried regenrated example design of emif controller and using emif debug toolkit to confirm re run calibration multiple time to check the status of calibration.

So, what causes the calibration status failing at random address of write or read. ?

Thanks