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shandeep's avatar
shandeep
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4 years ago

DDR3 IP core clock

hi

Can i connect the pll_refclk input in the DDR3 ip core by using a PLL ip core. Does the pll_refclk input in the DDR3 core has to be provided by means of an oscillator.

3 Replies

  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hello shandeep,


    You can connect it with the PLL IP but I think you need to close the timing issue due to that connection.

    It's should be connected to the clock source pin.


    You should refer to the EMIF User Guide in Chapter 6: DDR3 - Pin and Resource Planning.


    Thanks,

    Adzim


    • shandeep's avatar
      shandeep
      Icon for New Contributor rankNew Contributor
      4 years ago

      hi AdzimZM

      Thanks for your advice.

      with regards

      shandeep

  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you