Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

ddr3 altmemphy problem

i use the mega altmemphy to produce a ddr3 controller,sim is ok,(200us mem_rst_n gets high,700us begin ini),but on board,i cannot get any result,how should i verify it? In signaltap ,mem_rst_...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

In Quartus: Tools -> External Memory Interface Toolkit. Wait for all JTAG connections to be discovered and wait for UniPHY to respond with the results. You'll see PLL status and controller status.