Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

DDR2 with Terasic's DE-4 board

Hi all, I'm new to DDR interfacing but I spent weeks trying to have UniPHY or ALTMEMPHY work with my DE-4 board, a 1GB SO-DIMM, and the stratix IV FPGA. No success yet. Firstly, the demo that c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Hi Anakha, I have checked Terasic's code line by line. There is no peculiar operations being done. Just Regular memory access by ANSI's memcpy function. Would it be possible that Altera's implementation for the memcpy (wherever the runtime library is located) is doing the reconfiguration transparently ? And that their example driver is not ? I am going to use Terasic's code as a template and build upon it, but I really see no reason why the example driver would fail for an identical configuration.