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Honored Contributor
15 years agoHi Yuying
Concerning your assumptions: - It is hardware (using EP3SL50F780C2N FPGA) - Timing Analyzer does allways pass. However, I'll check the report in detail. Do you know which signal / signal groups are related to the s_tracking_setup state (I read about voltage/temperature compensation control in the manual, but have no clue which physical elements / signals are involved)? Further more, I migrated the a primitive sample design to the Stratix III evaluation board (due to another reason), which is using EP3SL150F1152C2N. The same issue shows up there as well. And I have now even two error cases, one temperature-inverse (which puzzles me even more). I attached the demo case, with the two .sof error case files: - good at low temperature, bad at high temperature (DevKit_100702_V02.sof) - bad at low temperature, good at low temperature (DevKit_100702_V03.sof) Regards, Peter