Agrl
New Contributor
3 years agoDDR timing violation
I am getting the violation for the nodes
-0.493 PCIe_X8_SUB_SYSTEM|emif_1|emif_1|ecc_core|core|ecc|internal_master_wr_data_ready PCIe_X8_SUB_SYSTEM|mm_interconnect_0|agent_pipeline_002|gen_inst[0]....