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Agrl's avatar
Agrl
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3 years ago

DDR timing violation

I am getting the violation for the nodes -0.493 PCIe_X8_SUB_SYSTEM|emif_1|emif_1|ecc_core|core|ecc|internal_master_wr_data_ready PCIe_X8_SUB_SYSTEM|mm_interconnect_0|agent_pipeline_002|gen_inst[0]....
Agrl's avatar
Agrl
Icon for New Contributor rankNew Contributor
3 years ago

Hi Adzim,

Below is the report of timing analysis. after adding pcie i am seeing this error. before adding the Pcie same violation but with +slack i am able to see.