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ABenj2's avatar
ABenj2
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3 years ago

CYCLONE V PLL issue

I'm using Quartus 18.1 , The source clock, output clock, reset signal and locked signal can be viewed on test pins (see attached scope capture). All VCCA_FPLL pins are driven from a 2.5V source....
  • ABenj2's avatar
    ABenj2
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    2 years ago

    Hello

    I have revised my PCB and added a ground plane beneath the voltage regulator. However, I am still experiencing issues with the PLL not working on some channels. When measuring the voltage on the RREFֹTL pin, I am seeing 0V. I believe this may be indicative of a problem. What steps would you recommend I take to resolve this issue?

    regards