Solved
Forum Discussion
Wincent_Altera
Regular Contributor
3 years agoHi,
We wouldn't advise turning off the CLKUSR clock. In my view the FPGA device won't be expecting this to happen.
The CYclone 10 PCG states on page 19 :
- This pin is used as the clock for transceiver calibration, and is a mandatory requirement when using transceivers.
- This pin is optionally used for EMIF HMC calibration, as well as a configuration clock input for synchronizing the initialization of more than one device.
- This is a user-supplied clock and the input frequency range must be in the range from 100 MHz to 125 MHz.
- https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/dp/cyclone-10/pcg-01022.pdf
Hope this clarified,
Regards,
Wincent_Intel