CXL Example Design simulation: long simulation time

Hi,

The Type 3 simulation for the CXL Example Design, v1.7, takes almost 5 hours to complete. It seems that the transactions happen through the serial interface, including the BFM in the testbench.

Is there a way to bypass the serial interface and connect the BFM to the PIPE (or AIB) of the Soft Wrapper?

Is there a way to skip the link negotiation and initializations of the physical interface?

Thank you,

Ricardo.