CXL Example Design simulation: Illegal combination of drivers

Hi,

Yes. The same messages of the type:

Error-[CFCILFBI] Cannot find cell in liblist
/fpga/cxltyp3ddr_tb_22p4/run/qpds_ed_rtl_t3ip//intel_rtile_cxl_top_cxltyp3_ed/altera_iopll_1931/sim/intel_rtile_cxl_top_cxltyp3_ed_altera_iopll_1931_lsetw4a.vo, 270
Cell 'tennm_iopll' cannot be found in liblist for binding instance
'cxl_tb_top.dut.intel_rtile_cxl_top_inst.intel_rtile_cxl_top_0.cxl_memexp_sip_top.gen_clkrst.cxl_memexp_sip_clkgen.rnr_ial_sip_clkgen_pll.tennm_pll'.
Liblist: TB_LIB AVMM_INTERCONNECT LIB_T3IP LIB_CXLIP_LIB DEFAULT
Config rule:
"/fpga/cxltyp3ddr_tb_22p4/tb/verif/tb_top/cxl_tb_top_config.sv",
61: default liblist tb_lib avmm_intercon ...
Source Info: tennm_iopll #(.auto_clk_sw_en("false"), .bw_mode("low_bw"),
.c0_bypass_en("true"), .c0_even_duty_en("false"), .c0_high(256),
.c0_low(256), .c0_out_en(counter0 ...

I don't see any errors during the compilation, so it seems that whatever is missing should be coming a pre-compiled library. (?)

Is it correct to set env variables QUARTUS_INSTALL_DIR and QUARTUS_LIB_DIR to the same directory?

Thanks,

Ricardo.