Forum Discussion
pudding_art
New Contributor
2 years agoCXL design example simulation:
Hello! When I use Avery VIP and CXL testbench to simulate cxl design exmaple, the following error occurs. # > sh vcs_sim_dtl_save.sh <cxl design example directory> OS: centos7.4 Quartus Pri...
WZ2
Frequent Contributor
2 years agoAs we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.