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Altera_Forum's avatar
Altera_Forum
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18 years ago

Converting Quartus 6.0 component to 7.2+

Hello:

In Quartus 6.0sp1, I created a relatively simple Avalon Master interface for an external processor. Using Component Editor to create the new component, I added an Interface (Avalon Master) and added the 8-10 signals (address, data, etc etc) needed by the Top Level to connect into the SOPC system. My external processor connected through this component into the system defined by SOPC.

Now I need to go back and add some new features & (naively?) attempted to update to 7.2. Component Editor doesn't work the same way though.

What's the closest approximation to the component I had created previously? The Conduit interface might be it, but I haven't found sufficient documentation to make sure. Or am I missing the point entirely?

Any help is GREATLY appreciated! Thanks in advance!

Kevin.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Use a conduit interface for any signals you need to export out of the SOPC system. For the avalon master, use an avalon memory-mapped master interface.

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Thanks for the reply!

    How will I tell the system how to connect the conduit/exported signals to the appropriate Avalon Master signals. I believe that requires HDL code, correct?

    Again, thanks for the help!

    Kevin.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Okay. Well you really have two options.

    1 - You write HDL code that does the conversion from the Avalon to whatever bus structure your external processor uses. Then yes you use a conduit to export whatever signals you need.

    2 - You don't provide HDL code. Create an Avalon Memory-Mapped master port and the signals will be automatically be exported for you. This is the same as in 6.0. If your component is not HDL-based, all signals will be exported.

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Option# 2 doesn't work exactly the same...the 7.2 Avalon Master only provides the split versions of data (readdata & writedata). The 6.0 version had those options and the bidirectional data type. Also the outputenable type is missing.

    Thanks for the reply....looks like I'm off to HDL!