Consolidate bugs of PCIe examples

Another bug,

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- in the file altpcierd_rxtx_downstream_intf.v

- the logic that controls the signal tx_busy

tx_busy is asserted too late.

It is asserted on the 2nd cycle after arbitration is granted and data is valid for transmission.

The error occurs when the PCIe tx_stream_ready is de-asserted right in the middle cycle after ARBITRATION is granted and TX_BUSY is asserted, the whole state machine gets stuck.

See picture,

the tx_sel_pcnt is the abitration grant signal, it is deasserted right after the statemachine sees that it is granted access. The state-machine is stuck there wait for acknowledgement from the PCIe core.

http://www.alteraforum.com/forum/attachment.php?attachmentid=3177&stc=1&d=1287051603

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