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Jack_H's avatar
Jack_H
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1 year ago

Connecting SSGDMA to PCIe on Agilex 5e - Port Width Mismatch

Hi everyone, I'm working on designing a PCIe device using the Agilex 5e chip and am trying to integrate DMA capabilities. Specifically, I'm using the Scalable Scatter-Gather DMA (SSGDMA) IP and conn...
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Jack_H's avatar
Jack_H
Icon for New Contributor rankNew Contributor
1 year ago

I see. Thanks. I have compiled the SSGDMA Design Example, and now I'm trying to access the Global CSR. I took a deeper look into the SSGDMA documentation, and found that the Global CSR through BAR0. I've tried to access these registers through the Ubuntu PCIe Driver that comes with the PCIe Design Example, but so far I couldn't make it work.

Do you know how to access these registers via the driver?

Best,

Jack