Forum Discussion
Hi marqs_ic,
Apologize for the delayed response.
May I confirm that the video format you are using is of embedded synchronization or separate synchronization?
Based on the Video and Image Processing Suite User Guide, vid_de is for separate synchronization mode only.
You may refer below link for more information:
Video and Image Processing Suite User Guide - 7.11.1. Clocked Video Input II Interface Signals
Thank you for your patience.
Best Regards,
ZulsyafiqH_Intel
Yes, I'm using separate synchronization mode.
For now I managed to work around the issue by using a FIFO to store valid samples and reading N samples at once (equivalent to pixels in parallel). When there are are less than N samples in FIFO, read is not done and VIP vid_datavalid bit is deasserted for that cycle. It would be still good if vid_datavalid width matched "pixels in parallel" which feels like how the IP is supposed to work.