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VMots's avatar
VMots
Icon for New Contributor rankNew Contributor
4 years ago

cascading pll with emif core (stratix10)

Hello! I have several emif (ddr4) controllers which everyone have it's own reference clock (from package pin) but I want to feed it from pll when I connect it together and try to implement it I get...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi VMots,

I'm Adzim. Thank you for using the Intel Community.

I've found a KDB for this error message. Link here.

You might need to follow the resolution in there.

I think you can enable it in the IOPLL IP under the Cascading tab.

I share the screenshot for that.

Please let me know if that helpful.

Thanks,

Adzim

  • VMots's avatar
    VMots
    Icon for New Contributor rankNew Contributor
    4 years ago

    I am already see this solution but this is not iopll core but the emif core and it need to have permit_cal input.