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rsing108's avatar
rsing108
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

can't program stratix 10 GX with pcie hard ip+ example design

I am getting the following errors while programming the Stratix 10 GX board with the PCIE hard ip+ example design. quartus_pro 19.4 Error (18950): Device has stopped receiving configuration data ...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Are you using a custom board and this is not Intel FPGA development kit? I'm asking this is because, the device ID 1SG280LN2F43E2VG is not the same as Stratix 10 Development Kit at the link below:


https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-s10-fpga.html


Other questions:

  1. Does the server is power up, and there is a valid PCIe clock sending from the server to FPGA when you program the FPGA?
  2. Do you able to program a simple design (without the PCIe)?


Regards -SK