Forum Discussion
That's right. The folding code builds its own logic & counters from the valid signal to drive enabled registers in the folded design so it can use single enabled resisters to schedule the data through the limited set of folded resources, rather than longer register chains. The way this is done currently puts a restriction on the use of the valid signal routed to blocks within the primitive subsystem. For folded design the input data pattern is usually one of one of more valid data samples, followed by many 'don't care' cycles, where the folded hardware does not process any more inputs, but continues working on the last valid data - completing before the next set of valid inputs. If you want to implement back-pressure, then you could try routing in the signal that controls this process in you primitive subsystem via a separate port: i.e. keep the valid signal as the signal specifying the pattern of valid input data and use a different data port to route in a signal to do the control you want. However, the folded system will only pay attention to this signal when valid is high - so you can't use it to interrupt. Else the folded subsystem produces data a slow rate, compared to the clock, so you could capture valid outputs in a FIFO in a following subsystem. Also note that if you stop providing valid input to a folded subsystem then obviously you'll stop getting valid output.
If there are longs gaps between valid data, and the design is single channel (i.e. one clock cycle where data is input, followed my many clock cycles of don't care) then I would recommend the ALU folder rather than the resource sharing folder.