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Andrey_Fazan's avatar
Andrey_Fazan
Icon for New Contributor rankNew Contributor
4 years ago

calibration of ddr4 interface on 10AX066H4F34E3SG

Hello! I'm trying to implement DDR4 40bit-wide interface with 3 devices MT40A512M16LY-062E. When I connect only one of 3 devices to the project, calibration and data exchange do well, but when I conn...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi Andrey,


Have you changed the device or board?

Because I notify that you used difference speedgrade in you EMIF IP.


I'm not understand on how do you configured the memory order.

Can you show the board design topology for the memory device connection?

Maybe you can draw a diagram for all groups.


For your new project, I think you should run the board simulation first to identify the optimum OCT value that your board can get.


Regards,

Adzim