Honored Contributor
Honored ContributorI think the DSP Builder/IP subforum is more about the DSP builder and its specific IPs. The FFT core is also a generic megafunction that can be used outside of DSP builder, so I think your thread can stay here. I think that most of us read all the subforums anyway, so placement isn't that critical. ;)
Looking at your third attachment, I see that you indeed assert the 'end of packet' signal after 2048 data values, but on the cycle just after that, the valid signal is still asserted, but not start of packet. You are pushing data to the FFT core without placing it inside a packet. You should do one of those two things:[list][*]either you want to send immediately a new set of values to the FFT core, and in that case you should assert the start of packet signal on cycle 2048[*]or you are done for now and don't need a new FFT calculation, and in that case de-assert the valid signal on cycle 2048 and wait for the result[/list] I'm surprised this didn't show up on the Modelsim simulation.
