Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Burst FFT SOP Error

Hi, I'm currently working on a burst fft core implementation. The problem is, I always get an error code 0x1 from the source_error bus of the fft block. The errors description is "Asserted wh...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Hi,

I just realized that there is a DSP IP sub forum, too. Maybe someone can move this thread over there and I possibly can get an answer there.

The problem really drives me crazy because I think everything is set up okay but it just is not working. Since it is working in modelsim, I always have to recompile my design for every bit I change in order to get it running. Depending on what bit I change, the compile times vary between 5 and 35 minutes. many time was wasted this way and I've got no idea anymore what to do next.

Regards,

Maik