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EGrub's avatar
EGrub
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

BUG - Fir filter coefficient read mode

Hi all! For writing/reading coefficients I made a wrapper to compute the proper reset before accessing the Avalon slave. Writing seems to work fine but reading has issues Considering the FIR II IP...
EGrub's avatar
EGrub
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Hi Chee Pin!

As I written in my previous post, the simulation does not work and does not behave as the real implementation -> therefore I started to capture data with the Signal Tap Logic Analyzer!

So setting up a simulation does not help. As I already wrote in an other post of a different topic.

Intel decided to stop the support requests and there is no NDA so I can not give company implementations to the puplic! So I cannot give you my project.

You could setup a project and capture real data with Signal Tap Logic Analyzer to see the issue. Same is true for simulation.

I will not setup Quartus 18.1 because as far as I saw there were no important changes. And if I have a look to the FIR filter release notes there were no changes after 17.1:

https://www.intel.com/content/www/us/en/programmable/documentation/hco1421697814795.html

Best regards,

Erich