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Contributor

15 days ago

Solved

Avalon-MM Cyclone V Hard IP for PCI Express Intel FPGA IP Soft Reset and Hard Reset

Dear Intel, Based on the forum info and datasheet it is allow to use soft reset rather than hard reset. In order to do so, changing <parameter name="force_src" value="0" /> to <parameter name="f...

Pcie

BrianSune_Froum
1 day ago
Ok the solution to resolve SRC under Hard PCIe RP:
The example from rocketchip and MitySOM gate the mgmt reset by nreset_status.
Due to pin_perst is not used -> 1'b1

The nreset_status will not release unless mgmt is reset with npor while gating mgmt reset by
nreset_status will dead lock and never exit the reset.

BrianSune_Froum

Contributor

13 days ago

Hi Altera,

More info:

Based on the STLA, it looks like the reconfiguration calibration never turn low after reset.
While HRC can work without any issue.

The SRC simply feed 1'b1 to the pin_perst and please do help or provide instruction to fix this trouble.

Thanks,

Brian

BrianSune_Froum

Contributor

1 day ago

Ok the solution to resolve SRC under Hard PCIe RP:

The example from rocketchip and MitySOM gate the mgmt reset by nreset_status.

Due to pin_perst is not used -> 1'b1

The nreset_status will not release unless mgmt is reset with npor while gating mgmt reset by

nreset_status will dead lock and never exit the reset.

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Avalon-MM Cyclone V Hard IP for PCI Express Intel FPGA IP Soft Reset and Hard Reset

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