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Altera_Forum
Honored Contributor
Honored Contributoravalon mm byte enable
In the project we are currently working on, we want to read and write pixels to external DDR SDRAM. We need to be able to use byte-mask / byte-enable bits to not overwrite some previously writt...
Altera_ForumHonored Contributor
Honored ContributorThank you so much. I have another question. I am passing the address out from the slave (conduit) and a signaltap file monitors all the values. Internally the address is getting messed up.
For the master_read_16 commands-- Master address = 0x00 ……………………………. Slave address = 0x00 Master address = 0x04 ……………………………. Slave address = 0x02 Master address = 0x08 ……………………………. Slave address = 0x04 Master address = 0x0C ……………………………. Slave address = 0x06 For the master_write_16 commands-- Master address = 0x00 ……………………………. Slave address = 0x02 Master address = 0x04 ……………………………. Slave address = 0x04 Master address = 0x08 ……………………………. Slave address = 0x06 Master address = 0x0C ……………………………. Slave address = 0x08 I get it that the address provided by the master it is shifted right by one bit when it arrives at the slave. This is indeed happening when I perform master_read_16. But when for master_write_16 this is not true. Why is the internal address mapping different for reads and writes? Also Byteeable is always 00 while write operation. Is that right?
