Forum Discussion
Arria10 PCIe need two DMAs, (one for data moving ; the other for control msg transfer)
- 5 years ago
Hi,
You can refer to the following link chapter 30 for the detail of the MSGDMA:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf
This depends on your application and requirement to customize the arbitrator and descriptor controller. Hence, I might not able to provide further design recommendations.
Regards -SK
The multiple DMAs setting is NOT supported on Arria 10 PCIe AVMM DMA IP, and there is no similar example available at this moment.
Regards -SK
- JET602005 years ago
Contributor
Thanks @SengKok_L_Intel for reply,
If we consider “PCIe AVMM IP setting” (instead of AVMM DMA IP ), is it possible to connect "two independent mSGDMA instances" to this single “PCIe AVMM IP‘s’" TXA Slave Port ?
What I means is " the two sMGDMA module will mainatein their own pcie DMA operation seperately, while share the same gen3x8 PCIE BUS” , Does this implementation feasible, and does it need an arbitrator ? Thanks a lot