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Aflop
Occasional Contributor
Occasional ContributorArria 10 PCIe DMA Bus Mastering
Background: I have been working with the Arria 10 GX Devkit and using the PCIe with DMA HIP. I have the general scheme working with 5 BARs of memory with a few minor kinks. Problem : In addition ...
AflopOccasional Contributor
Occasional ContributorAdditionally, I am reading the "Arria 10 and Cyclone 10 GX Avalon-MM Interface for PCI Express User Guide". I'm sure that if I spent the next year studying it I might have a viable solution, but what I am looking for is a process.
Section 6.8.1 Sending a Write TLP - seems like it is part of the process. It looks like this might be where I insert the host memory address but the process does not go into sending the data.
Does a step-by-step process exist for this somewhere or could anyone help me to connect the dots?
