Assuming you're using the Matlab core model that Quartus generates for your Matlab runs, you should see exact matches between Verilog sims and Matlab sims. If you're using the software FFT in Matlab, you will see differences, especially for low values of input into the Altera core...accuracy improves as input level goes up but you will never see exact matches between the core and a software fft.
If your question is regarding how to pull out the last two lines of the FFT values, you need a state machine to drive sink_valid, sink_eop and sink_sop. You need to drop sink_valid at the last sink_eop that corresponds to your last valid input data. You then need to drive sink_sop/sink_eop pairs for the last two lines out of the core.
If you provide more detail regarding the problem you're seeing, perhaps I (or someone else here) can provide you with better answers.