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Altera_Forum's avatar
Altera_Forum
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14 years ago

ALTASMI_PARALLEL pin voltage Error!

I am getting the following error in Quartus when trying to use the altasmi_parallel megafunction with Bank 1 voltage set at 3.3V. Anyone have this problem?

Error: Pin remote_update:remote_update_inst|asmi:asmi_inst|asmi_altasmi_parallel_bfe2:asmi_altasmi_parallel_bfe2_component|cycloneii_asmiblock3~ALTERA_DCLK is incompatible with I/O bank 1. It uses I/O standard 2.5 V, which has VCCIO requirement of 2.5V. That requirement is incompatible with bank's VCCIO setting or other output or bidirectional pins in the bank using VCCIO 3.3V.

Info: Pin rf_sw[0] in I/O bank 1 uses VCCIO 3.3V

Info: Pin rf_sw[1] in I/O bank 1 uses VCCIO 3.3V

Info: Pin rf_sw[2] in I/O bank 1 uses VCCIO 3.3V

Extra Info: Device EP4CE75F29I7

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Yes, I changed the Default I/O standard to 3.3-V LVCMOS. This is found in the Device and Pin Options under Voltage.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    I encountered similar problem. I used Cyclone III's ASMI_PARALLEL megafunction, and the error meassage is as below.

    ASMI_PARALLEL:i_ASMI_PARALLEL|ASMI_PARALLEL_altasmi_parallel_e632:ASMI_PARALLEL_altasmi_parallel_e632_component|cycloneii_asmiblock2~ALTERA_DCLK is incompatible with I/O bank 1. It uses I/O standard 2.5 V, which has VCCIO requirement of 2.5V. That requirement is incompatible with bank's VCCIO setting or other output or bidirectional pins in the bank using VCCIO 3.3V.

    Any idea?