Altera_Forum
Honored Contributor
13 years agoalt_mem_phy DDR2 controller INIT_done going LOW.
Hi all.
Need help. I have a problem with DDR2. I'm using DDR2 HPC1 memctrl with alt_mem_phy IP and EPCGX110DF31I7. Addressing 2 parallel MT47H128M16HG-3IT:A (FBGA-84) "MICRON (totaling to 32-bit data bus width, 1 nCS). I using Quartus 11.1 sp2. pll_ref_clk=40 MHz. phy_clk = 140 MHz. controller data rate= Half. Enable user Auto-refresh control =on. Native interface. Problem with replication of nCS, CKE, ODT – solved. I done tcl file and add ddr sdc file. Onchip series termination on (50 Ohm without calibration). Devices always starting and working normal, but in a one moment local_init_done going LOW and after not going HIGH never. Only after global reset alt_mem_phy DDR2 controller release local_init_done ('1'). Device can working all day, but can work only few minutes. This behavior repeat on all devices. Why local_init_done may be falling? Files of DDR2 controller encrypted and I not view condition of this case in HDL file. Thanks for any help! Alex