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vikas194's avatar
vikas194
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3 years ago

ALT LVDS RX IP does not support Frame clock ?

Hello, we are designing a LVDS receiver on Cyclone 10 LP which receives differential data from TI AWR6843 . We have 3 ports from AWR6843 that is 1. Differential data out, 2. Differential clock...
vikas194's avatar
vikas194
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3 years ago

Hello frank, thanks for replying
Since we are using only frame clock, is it okay to discard bit clock (differential clock out from AWR6843)? if not, how can this clock be used?

Also I wanted to know how rx_channel_data_align input has to be generated with respect to frame clock, since we don't have this logic in TI AWR6843 LVDS TX.

regards

Vikas