Forum Discussion
Agilex5 GTS Reset Sequence
- 1 year ago
Hi,
Referring back to your initial observation that suggests a possible FPGA configuration failure, I believe it’s important to isolate this issue first.
Would you be able to try programming the device directly via JTAG to confirm whether the FPGA can be successfully configured? From my understanding, the XCVR reset typically does not impact FPGA configuration, as the transceiver logic only starts operating after a successful configuration.
Unless the message “FPGA reconfiguration failed” is referring to something else (e.g., a soft reconfiguration or user logic indication), it may not be a true configuration failure.
Please let me know if you have any concerns or need further assistance. Thank you!
Best regards,
Chee Pin
Hi,
Just to add on, you may consider simplifying your reset release condition by making it dependent solely on o_tx_reset_ack and o_rx_reset_ack. These two signals indicate that the TX and RX paths are fully reset, which may help streamline your logic.
Thanks!
- K6061 year ago
Contributor
Thanks! This is reflected now in the recent post