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kharitonow
New Contributor
New ContributorAgilex 7 I F-Tile Direct PHY: example TB doesn't work
Hello community, I'm unable to run an example design for F-Tile on Agilex 7 I-Series device. I've tried following: 1. generate an example design using platform designer, 2. open the generat...
Hi,
For the generated example designs, the scripts are already created. You just need to navigate to the right directory and source the scripts in the terminal. Make sure that the Quartus and the simulator are correctly loaded. For reference, go through the last portion of the following section in the user guide.
Regards
Ash_R_Altera
Regular Contributor
Regular ContributorPlease let me know if further assistance is needed or if the solution worked for you.
Regards
kharitonowNew Contributor
New ContributorThanks for response.
It works using example_design/testbench/run_vsim.tcl script.
The only differences I see between my approach in the simulation startup and the generated script-basted startup script lies in defines, which are placed in USER_DEFINED_COMPILE_OPTIONS and USER_DEFINED_VERILOG_COMPILE_OPTIONS variables.
